External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

2.7. Examples of External Memory Interface Implementations for DDR4

The following figures are examples of external memory interface implementations for different DDR4 memory widths. The figures show the locations of the address/command and data pins in relation to the locations of the memory controllers.

Figure 42. DDR4 1x8 Implementation Example (One I/O Bank)


Figure 43. DDR4 1x32 Implementation Example (Two I/O Banks)


Figure 44. DDR4 1x72 Implementation Example (Three I/O Banks)


Figure 45. DDR4 2x16 Implementation Example with Controllers in Non-Adjacent Banks (Three I/O Banks)


Figure 46. DDR4 2x16 Implementation Example with Controllers in Adjacent Banks (Three I/O Banks)


Figure 47. DDR4 1x144 Implementation Example (Six I/O Banks)


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