External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

3.7. Examples of External Memory Interface Implementations for DDR4

The following figures are examples of external memory interface implementations for different DDR4 memory widths. The figures show the locations of the address/command and data pins in relation to the locations of the memory controllers.

Figure 95. DDR4 1x8 Implementation Example (One I/O Bank)


Figure 96. DDR4 1x32 Implementation Example (Two I/O Banks)


Figure 97. DDR4 1x72 Implementation Example (Three I/O Banks)


Figure 98. DDR4 2x16 Implementation Example with Controllers in Non-Adjacent Banks (Three I/O Banks)


Figure 99. DDR4 2x16 Implementation Example with Controllers in Adjacent Banks (Three I/O Banks)


Figure 100. DDR4 1x144 Implementation Example (Six I/O Banks)