3.4.1. Arria® 10 EMIF Architecture: I/O Subsystem
Each column can be thought of as loosely analogous to an I/O bank.
The I/O subsystem provides the following features:
- General-purpose I/O registers and I/O buffers
- On-chip termination control (OCT)
- I/O PLLs for external memory interfaces and user logic
- Low-voltage differential signaling (LVDS)
- External memory interface components, as follows:
- Hard memory controller
- Hard PHY
- Hard Nios processor and calibration logic
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