External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

3.23.53. ecc1: ECC General Configuration

address=128(32 bit)

Field Bit High Bit Low Description Access
cfg_enable_ecc 0 0 A value of 1 enables the ECC encoder/decoder. Read/Write
cfg_enable_dm 1 1 A value of 1 indicate that this is a design with DM. Read/Write
cfg_enable_rmw 2 2 A value of 1 enables the RMW feature, including partial/dummy write support. Read/Write
cfg_data_rate 6 3 Set this value to 2, 4, or 8 for full, half or quarter rate designs. Read
cfg_ecc_in_protocol 7 7

Set this value to 1 for Avalon-MM or 0 for Avalon-ST input interface. Read-only register.

Read/Write
cfg_enable_auto_corr 8 8 A value of 1 enables the auto correction feature, injecting a dummy write command after a single-bit error is (SBE) detected. This feature must be enabled together with RMW and ECC. Read/Write
cfg_enable_ecc_code_overwrite 9 9 A value of 1 enables the ECC code overwrite feature. Reuse the original read-back ECC code during RMW if a double-bit error (DBE) is detected. Read/Write
Reserved 31 10

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