External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Document Table of Contents

3.23.9. ctrlcfg8: Controller Configuration

address=18(32 bit)

Field Bit High Bit Low Description Access
cfg_3ds_en 0 0 Setting to 1 to enable #DS support for DDR4. Read/Write
cfg_ck_inv 1 1 Use to program CK polarity. 1 Read/Write
cfg_addr_mplx_en 2 2 Setting to 1 enables RLD3 address mulplex mode. Read/Write