External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

3.23.1. ctrlcfg0: Controller Configuration

address=10(32 bit)

Field Bit High Bit Low Description Access
cfg_mem_type 3 0 Selects memory type. Program this field with one of the following binary values, "0000" for DDR3 SDRAM, "0001" for DDR4 SDRAM, "0010" for LPDDR3 SDRAM and "0011" for RLDRAM3. Read/Write
cfg_dimm_type 6 4 Selects dimm type. Program this field with one of the following binary values: 3' b000: for DIMM_TYPE_COMPONENT, 3' b001: for DIMM_TYPE_UDIMM, 3' b010: for DIMM_TYPE_RDIMM, 3' b011: for DIMM_TYPE_LRDIMM, 3' b100: for DIMM_TYPE_SODIMM, and 3' b101: for DIMM_TYPE_3DS. Read/Write
cfg_ac_pos 8 7 Specify C/A (command/address) pin position. Read/Write
cfg_ctrl_burst_length 13 9 Configures burst length for control path. Legal values are valid for JEDEC allowed DRAM values for the DRAM selected in cfg_type. For DDR3, DDR4 and LPDDR3, this should be programmed with 8 (binary "01000"), for RLDRAM III it can be programmed with 2 or 4 or 8. Read/Write
cfg_dbc0_burst_length 18 14 Configures burst length for DBC0. Legal values are valid for JEDEC allowed DRAM values for the DRAM selected in cfg_type. For DDR3, DDR4 and LPDDR3, this should be programmed with 8 (binary "01000"), for RLDRAM III it can be programmed with 2 or 4 or 8. Read/Write
cfg_dbc1_burst_length 23 19 Configures burst length for DBC1. Legal values are valid for JEDEC allowed DRAM values for the DRAM selected in cfg_type. For DDR3, DDR4 and LPDDR3, this should be programmed with 8 (binary "01000"), for RLDRAM III it can be programmed with 2 or 4 or 8. Read/Write
cfg_dbc2_burst_length 28 24 Configures burst length for DBC2. Legal values are valid for JEDEC allowed DRAM values for the DRAM selected in cfg_type. For DDR3, DDR4 and LPDDR3, this should be programmed with 8 (binary "01000"), for RLDRAM III it can be programmed with 2 or 4 or 8. Read/Write

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