External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

2.17.2. AFI Parameters

The following tables list Altera PHY interface (AFI) parameters for AFI 4.0.

The parameters described in the following tables affect the width of AFI signal buses. Parameters prefixed by MEM_IF_ refer to the signal size at the interface between the PHY and memory device.

Table 28.  Ratio Parameters 

Parameter Name

Description

AFI_RATE_RATIO

The ratio between the AFI clock frequency and the memory clock frequency. For full-rate interfaces this value is 1, for half-rate interfaces the value is 2, and for quarter-rate interfaces the value is 4.

DATA_RATE_RATIO

The number of data bits transmitted per clock cycle. For single-date rate protocols this value is 1, and for double-data rate protocols this value is 2.

ADDR_RATE_RATIO

The number of address bits transmitted per clock cycle. For single-date rate address protocols this value is 1, and for double-data rate address protocols this value is 2.

Table 29.  Memory Interface Parameters

Parameter Name

Description

MEM_IF_ADDR_WIDTH

The width of the address bus on the memory device(s).

MEM_IF_BANKADDR_WIDTH

The width of the bank address bus on the interface to the memory device(s). Typically, the log 2 of the number of banks.

MEM_IF_CS_WIDTH

The number of chip selects on the interface to the memory device(s).

MEM_IF_WRITE_DQS_WIDTH

The number of DQS (or write clock) signals on the write interface. For example, the number of DQS groups.

MEM_IF_CLK_PAIR_COUNT

The number of CK/CK# pairs.

MEM_IF_DQ_WIDTH

The number of DQ signals on the interface to the memory device(s). For single-ended interfaces such as QDR II, this value is the number of D or Q signals.

MEM_IF_DM_WIDTH

The number of data mask pins on the interface to the memory device(s).

MEM_IF_READ_DQS_WIDTH

The number of DQS signals on the read interface. For example, the number of DQS groups.

Table 30.  Derived AFI Parameters 

Parameter Name

Derivation Equation

AFI_ADDR_WIDTH

MEM_IF_ADDR_WIDTH * AFI_RATE_RATIO * ADDR_RATE_RATIO

AFI_BANKADDR_WIDTH

MEM_IF_BANKADDR_WIDTH * AFI_RATE_RATIO * ADDR_RATE_RATIO

AFI_CONTROL_WIDTH

AFI_RATE_RATIO * ADDR_RATE_RATIO

AFI_CS_WIDTH

MEM_IF_CS_WIDTH * AFI_RATE_RATIO

AFI_DM_WIDTH

MEM_IF_DM_WIDTH * AFI_RATE_RATIO * DATA_RATE_RATIO

AFI_DQ_WIDTH

MEM_IF_DQ_WIDTH * AFI_RATE_RATIO * DATA_RATE_RATIO

AFI_WRITE_DQS_WIDTH

MEM_IF_WRITE_DQS_WIDTH * AFI_RATE_RATIO

AFI_LAT_WIDTH

6

AFI_RLAT_WIDTH

AFI_LAT_WIDTH

AFI_WLAT_WIDTH

AFI_LAT_WIDTH * MEM_IF_WRITE_DQS_WIDTH

AFI_CLK_PAIR_COUNT

MEM_IF_CLK_PAIR_COUNT

AFI_WRANK_WIDTH

Number of ranks * MEM_IF_WRITE_DQS_WIDTH *AFI_RATE_RATIO

AFI_RRANK_WIDTH

Number of ranks * MEM_IF_READ_DQS_WIDTH *AFI_RATE_RATIO

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