Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 2/15/2023
Document Table of Contents

6.5.6. User Watchdog Timer

The user watchdog timer prevents a faulty application configuration from stalling the device indefinitely.

You can use the timer to detect functional errors when an application configuration is successfully loaded into the device. The timer is automatically disabled in the factory configuration, and enabled in the application configuration.

The counter is 29 bits wide and has a maximum count value of 229 . When specifying the user watchdog timer value, specify only the most significant 12 bits. The granularity of the timer setting is 217 cycles. The cycle time is based on the frequency of 10 MHz internal oscillator or CLKUSR (maximum frequency of 40 MHz).

The timer begins counting as soon as the application configuration enters user mode. The application configuration periodically reload or reset this timer before the count expires by asserting RU_nRSTIMER. If the application configuration does not reload the user watchdog timer before the count expires, the remote system upgrade circuitry generates a time-out signal. The time-out signal triggers the circuitry to set the user watchdog timer status bit (Wd) in the remote system upgrade status register and reconfigures the device by loading the factory configuration image. To reset the time, assert RU_nRSTIMER active for a minimum of 250 ns. This is equivalent to strobing the reset_timer input of the Altera Remote Update IP core high for a minimum of 250 ns.

Errors during configuration are detected by the CRC engine. Functional errors must not exist in the factory configuration because it is stored and validated during production and is never updated remotely.