Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

6.1.4.7. JTAG Instructions

You can perform JTAG testing on Intel® Cyclone® 10 LP devices before, during, and after configuration using the JTAG instructions.

Intel® Cyclone® 10 LP devices support the BYPASS, IDCODE, and SAMPLE instructions during configuration without interrupting configuration.

All other JTAG instructions can only be issued by first interrupting configuration and reprogramming I/O pins with the ACTIVE_DISENGAGE and CONFIG_IO instructions.
  • The CONFIG_IO instruction configures the I/O buffers through the JTAG port and interrupts configuration when issued after the ACTIVE_DISENGAGE instruction. This instruction allows you to perform board-level testing prior to configuring the Intel® Cyclone® 10 LP device or waiting for a configuration device to complete configuration.
  • Before issuing the CONFIG_IO instruction, you must issue the ACTIVE_DISENGAGE instruction. In Intel® Cyclone® 10 LP devices, the CONFIG_IO instruction does not hold nSTATUS low until reconfiguration, so you must disengage the active configuration mode controller when active configuration is interrupted. The ACTIVE_DISENGAGE instruction places the active configuration mode controllers in an idle state before JTAG programming.

The ACTIVE_ENGAGE instruction allows you to re-engage a disengaged active configuration mode controller.

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