Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

2.2.3. Read Enable

M9K memory blocks support the read enable feature for all memory modes.
Table 3.  Effects of Read Enable on Data Output Port
If you... ...Then
Create the read-enable port and perform a write operation with the read enable port deasserted. The data output port retains the previous values from the most recent active read enable.
Activate the read enable during a write operation or do not create a read-enable signal. The output port shows either the new data being written and the old data at that address, or a "Don't Care" value when read-during-write occurs at the same address location.

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