Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

1.2.1. LAB Interconnects

The LAB local interconnect is driven by column and row interconnects and LE outputs in the same LAB.

The direct link connection minimizes the use of row and column interconnects to provide higher performance and flexibility. The direct link connection enables the neighboring elements from left and right to drive the local interconnect of an LAB. The elements are:

  • LABs
  • PLLs
  • M9K embedded memory blocks
  • Embedded multipliers

Each LE can drive up to 48 LEs through local and direct link interconnects.

Figure 5. LAB Local and Direct Link Interconnects for Intel® Cyclone® 10 LP Devices

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