Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 2/15/2023
Public
Document Table of Contents

5.2.3. Intel® Cyclone® 10 LP VREF Pins Per I/O Bank

Table 28.  Number of VREF Pins Per I/O Bank in Intel® Cyclone® 10 LP Device Packages
Device Package I/O Bank
1 2 3 4 5 6 7 8
10CL006 U256 1 1 1 1 1 1 1 1
E144 1 1 1 1 1 1 1 1
10CL010 M164 1 1 1 1 1 1 1 1
U256 1 1 1 1 1 1 1 1
E144 1 1 1 1 1 1 1 1
10CL016 M164 2 2 2 2 2 2 2 2
U256 2 2 2 2 2 2 2 2
U484 2 2 2 2 2 2 2 2
E144 2 2 2 2 2 2 2 2
F484 2 2 2 2 2 2 2 2
10CL025 U256 1 1 1 1 1 1 1 1
E144 1 1 1 1 1 1 1 1
10CL040 U484 4 4 4 4 4 4 4 4
F484 4 4 4 4 4 4 4 4
10CL055 U484 2 2 2 2 2 2 2 2
F484 2 2 2 2 2 2 2 2
10CL080 U484 3 3 3 3 3 3 3 3
F484 3 3 3 3 3 3 3 3
F780 3 3 3 3 3 3 3 3
10CL120 F484 3 3 3 3 3 3 3 3
F780 3 3 3 3 3 3 3 3