Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

6.1.2. Passive Serial Configuration

The PS configuration scheme uses an external host.

You can use external hosts such as a MAX® V device, microprocessor with flash memory, or a download cable.

In the PS scheme, an external host controls the configuration. Configuration data is clocked into the target Intel® Cyclone® 10 LP device through DATA[0] at each rising edge of DCLK.

Figure 87. High-Level Overview of Flash Programming for PS Configuration Scheme


PS Configuration Connection Guidelines

Consider the following guidelines when you configure the Intel® Cyclone® 10 LP devices:

  • Connect the pull-up resistors of the FPGA device to the VCC supply of the bank in which the pin resides.
  • You can leave the nCEO pin unconnected or use it as a user I/O pin when it does not feed the nCE pin of another device.
  • The MSEL pin settings vary for different configuration voltage standards and POR time.
  • The nCSO and ASDO pins are dual-purpose I/O pins. The ASDO pin also functions as the DATA[1] pin in FPP mode.
  • For multi-device configurations, connect the pull-up resistor of the slave FPGA device(s) to the VCCIO supply voltage of I/O bank in which the nCE pin resides.
  • Connect the repeater buffers between the master and slave devices of the FPGA device for DATA[0] and DCLK. All I/O inputs must maintain a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers must fit the maximum overshoot equation.
  • The 50 Ω series resistors are optional if the 3.3 V configuration voltage standard is applied. For optimal signal integrity, connect these 50 Ω series resistors if the 2.5 V or 3.0 V configuration voltage standard is applied.
Note: For PS configuration, check the I/O voltage if the I/O pins are assigned in bank 1, which contain the configuration pins. Refer to the MSEL Pin Settings for Each Configuration Scheme of Intel® Cyclone® 10 LP Devices with MSEL[3:0] Pins table in the MSEL Pin Settings section for the supported configuration standard voltage.

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