Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

1.2. Logic Array Block

The LABs are configurable logic blocks that consist of a group of logic resources.

Each LAB consists of the following:

  • 16 logic elements (LEs)—smallest logic unit in Intel® Cyclone® 10 LP devices
  • LE carry chains—carry chains propagated serially through each LE within an LAB
  • LAB control signals—dedicated logic for driving control signals to LEs within an LAB
  • Local interconnect—transfers signals between LEs in the same LAB
  • Register chains—transfers the output of one LE register to the adjacent LE register in an LAB
Figure 4. LAB Structure of Intel® Cyclone® 10 LP Devices

The Intel® Quartus® Prime Compiler places associated logic in an LAB or adjacent LABs, allowing the use of local and register chain connections for performance and area efficiency.

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