Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

5.6. Programmable IOE Features in Intel® Cyclone® 10 LP Devices

The Intel® Cyclone® 10 LP I/O buffers support a range of programmable features. These features increase the flexibility of I/O utilization and provide an alternative to reduce the usage of external discrete components such as a pull-up resistor and a diode.
Table 31.  Summary of Supported Intel® Cyclone® 10 LP Programmable I/O Buffer Features and Settings
Feature

Setting

Condition Assignment Name
Open Drain
  • On
  • Off—Default
To enable this feature, use the OPNDRN primitive.
Bus-Hold
  • On
  • Off—Default
Disabled if you use the weak pull-up resistor feature. Enable Bus-Hold Circuitry
Pull-up Resistor
  • On
  • Off—Default
Disabled if you use the bus-hold feature. Weak Pull-Up Resistor
Slew Rate Control
  • 0 (Slow)
  • 1 (Medium)
  • 2 (Fast)—Default
Disabled if you use OCT with calibration. Slew Rate
PCI Clamp Diode
  • On—Default for input pins using supported I/O standards
  • Off—Default for output pins except 3.0 V PCI/PCI-X.
PCI I/O
Pre-Emphasis 0 (disabled), 1 (enabled). Default is 1. Programmable Pre-emphasis

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