Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

6.3.2.5. Initialization

The initialization clock source is from the internal oscillator, CLKUSR pin, or DCLK pin

By default, the internal oscillator is the clock source for initialization. If you use the internal oscillator, the Intel® Cyclone® 10 LP device is provided with enough clock cycles for proper initialization.

Note: If you use the optional CLKUSR pin as the initialization clock source and the nCONFIG pin is pulled low to restart configuration during device initialization, ensure that the CLKUSR or DCLK pin continues toggling until the nSTATUS pin goes low and then goes high again.

The CLKUSR pin provides you with the flexibility to synchronize initialization of multiple devices or to delay initialization. Supplying a clock on the CLKUSR pin during initialization does not affect configuration.

The CLKUSR pin allows you to control when your device enters user mode for an indefinite amount of time. You can turn on the Enable user-supplied start-up clock (CLKUSR) option in the General page of the Device and Pin Options dialog box in the Intel® Quartus® Prime software. When you turn on this option, the CLKUSR pin is the

initialization clock source.

After the configuration data is accepted and CONF_DONE goes high, Intel® Cyclone® 10 LP devices require 3,192 clock cycles to initialize properly and enter user mode.
Note: If you use the optional CLKUSR pin and the nCONFIG pin is pulled low to restart configuration during device initialization, ensure that the CLKUSR pin continues to toggle when nSTATUS is low (a maximum of 230 µs).

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