Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

5.2.4. Intel® Cyclone® 10 LP LVDS Channels Support

The LVDS channels available vary among Intel® Cyclone® 10 LP device packages.
Table 29.   LVDS Buffers in Intel® Cyclone® 10 LP Devices
  • True LVDS input is supported on top, right, and bottom I/O banks while output is supported on the right and left I/O banks.
  • Emulated LVDS input and output supported on all I/O banks.
Product Line Package LVDS Pairs Device Side LVDS Pairs Per Side
10CL006 U256 65 Top 20
Right 12
Left 11
Bottom 22
E144 22 Top 6
Right 6
Left 3
Bottom 7
10CL010 M164 26 Top 9
Right 7
Left 3
Bottom 7
U256 65 Top 20
Right 12
Left 11
Bottom 22
E144 22 Top 6
Right 6
Left 3
Bottom 7
10CL016 M164 22 Top 7
Right 6
Left 3
Bottom 6
U256 53 Top 14
Right 12
Left 9
Bottom 18
U484 137 Top 36
Right 37
Left 31
Bottom 33
E144 19 Top 6
Right 5
Left 2
Bottom 6
F484 137 Top 36
Right 37
Left 31
Bottom 33
10CL025 U256 52 Top 17
Right 10
Left 10
Bottom 15
E144 18 Top 5
Right 5
Left 3
Bottom 5
10CL040 U484 124 Top 33
Right 32
Left 29
Bottom 30
F484 124 Top 33
Right 32
Left 29
Bottom 30
10CL055 U484 132 Top 36
Right 34
Left 29
Bottom 33
F484 132 Top 36
Right 34
Left 29
Bottom 33
10CL080 U484 110 Top 29
Right 29
Left 26
Bottom 26
F484 110 Top 29
Right 29
Left 26
Bottom 26
F780 178 Top 51
Right 43
Left 35
Bottom 49
10CL120 F484 103 Top 28
Right 26
Left 25
Bottom 24
F780 230 Top 65
Right 53
Left 49
Bottom 63

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