Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

6.5.4.2. Status Register

The remote system upgrade status register specifies the reconfiguration trigger condition.

The various trigger and error conditions include:
  • Cyclical redundancy check (CRC) error during application configuration
  • nSTATUS assertion by an external device due to an error
  • Intel® Cyclone® 10 LP device logic array triggers a reconfiguration cycle, possibly after downloading a new application configuration image
  • External configuration reset (nCONFIG) assertion
  • User watchdog timer time out
Table 49.  Remote System Upgrade Current State Logic Contents In Status RegisterThe table lists the contents of the current state logic in the status register, when the remote system upgrade master state machine is in factory configuration or application configuration accessing the factory information or application information, respectively.
Remote System Upgrade Master State Machine Status Register Bit Name Description
Factory Information
Note: The remote system upgrade master state machine is in factory configuration.
31:30 Master state machine current state

The current state of the remote system upgrade master state machine.

29:24 Reserved bits

Padding bits that are set to all 0’s.

23:0 Boot address

The current 24-bit boot address that was used by the configuration scheme as the start address to load the current configuration.

Application Information 1
Note: The remote system upgrade master state machine is in application configuration.
31:30 Master state machine current state

The current state of the remote system upgrade master state machine.

29 User watchdog timer enable bit

The current state of the user watchdog enable, which is active high.

28:0 User watchdog timer time-out value

The current entire 29-bit watchdog time-out value.

Application Information 2
Note: The remote system upgrade master state machine is in application configuration.
31:30 Master state machine current state

The current state of the remote system upgrade master state machine.

29:24 Reserved bits

Padding bits that are set to all 0’s.

23:0 Boot address

The current 24-bit boot address used as the start address to load the current configuration.

The previous two application configurations are available in the previous state registers (previous state register 1 and previous state register 2), but only for debugging purposes.

Table 50.  Remote System Upgrade Previous State Register 1 and Previous State Register 2 Contents in Status RegisterThe previous state register 1 and previous state register 2 have the same bit definitions. The previous state register 1 reflects the current application configuration and the previous state register 2 reflects the previous application configuration.
Bit Name Description
30 nCONFIG source One-hot, active-high field that describes the reconfiguration source that caused the Intel® Cyclone® 10 LP device to leave the previous application configuration. If there is a tie, the higher bit order indicates precedence.

For example, if nCONFIG and remote system upgrade nCONFIG reach the reconfiguration state machine at the same time, nCONFIG precedes remote system upgrade nCONFIG.

29 CRC error source
28 nSTATUS source
27 User watchdog timer source
26 Remote system upgrade nCONFIG source
25:24 Master state machine current state The state of the master state machine during reconfiguration causes the Intel® Cyclone® 10 LP device to leave the previous application configuration.
23:0 Boot address The address used by the configuration scheme to load the previous application configuration.

If a capture is inappropriately done while capturing a previous state before the system has entered remote update application configuration for the first time, a value outputs from the shift register to indicate that the capture is incorrectly called.

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