Intel® Cyclone® 10 LP Core Fabric and General Purpose I/Os Handbook

ID 683777
Date 9/26/2022
Public
Document Table of Contents

5.6.3. Programmable Pull-Up Resistor

Each I/O pin provides an optional programmable pull-up resistor during user mode. The pull-up resistor weakly holds the I/O to the VCCIO level.

The Intel® Cyclone® 10 LP device supports programmable weak pull-up resistors only on user I/O pins but not on dedicated configuration pins, dedicated clock pins, or JTAG pins.

If you enable the weak pull-up resistor, you cannot use the bus-hold feature.

Note: When the optional DEV_OE signal drives low, all I/O pins remain tri-stated even if the programmable pull-up option is enabled.

Did you find the information on this page useful?

Characters remaining:

Feedback Message