Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Document Table of Contents

6.20. Reconfiguration Interface and Dynamic Reconfiguration Revision History

Document Version Changes
2019.05.13 Made the following change:
  • Renamed Altera Debug Master Endpoint (ADME) to Native PHY DebugMaster Endpoint (NPDME).
2017.11.06 Made the following changes:
  • Added a note to the "Using PRBS Data Pattern Generator and Checker" chapter.
  • Updated "Variable Gain Amplifier (VGA) Voltage Swing Select" from "radp_vga_sel_0 to radp_vga_sel_7" to "radp_vga_sel_0 to radp_vga_sel_4".
  • Added sentence "The dynamic reconfiguration interface is compliant to the AVMM specifications".
  • Changed VGA select in Register Map for CTLE Setting from 3'b00-3'b111 to 3'b00-3'b100.
2017.05.08 Initial release.