Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Document Table of Contents
Give Feedback Features

Table 99.  PHY Features
Feature Description
Multiple operating speeds 10M, 100M, 1G, 2.5G, 5G, and 10G.
MAC-side interface 32-bit XGMII for 10M/100M/1G/2.5G/5G/10G (USXGMII).
Network-side interface 10.3125 Gbps for 10M/100M/1G/2.5G/5G/10G (USXGMII).
Avalon® Memory-Mapped ( Avalon® -MM) interface Provides access to the configuration registers of the PHY.
PCS function USXGMII PCS for 10M/100M/1G/2.5G/5G/10G.

USXGMII Auto-negotiation supported in the 10M/100M/1G/2.5G/5G/10G (USXGMII) configuration.

Sync-E Provides the clock for Sync-E implementation.