Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Document Table of Contents Instantiating the fPLL IP Core

The fPLL IP core for Arria 10 transceivers provides access to fPLLs in hardware. One instance of the fPLL IP core represents one fPLL in the hardware.
  1. Open the Quartus Prime software.
  2. Click Tools > IP Catalog.
  3. In IP Catalog, under Library > Interface Protocols > Transceiver PLL, select fPLL Intel Arria 10/Cyclone 10 FPGA IP and click Add.
  4. In the New IP Variant dialog box, provide the IP instance name.
The fPLL IP core Parameter Editor window opens.