Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Document Table of Contents

7.2.2. Transceiver Channel Calibration Registers

Table 220.  Transceiver Channel PMA Calibration Registers
Bit PMA Calibration Enable Register Offset Address 0x100
0 Reserved
1 PMA RX calibration enable. Set 1, to enable calibration.38
2 Reserved
3 Reserved
4 Reserved
5 PMA TX calibration enable. Set 1, to enable calibration.
6 Adaptation mode. Set 0, to disable adaptation mode.
7 Reserved
38 CDR/CMU PLL calibration is part of PMA RX calibration.