Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Document Table of Contents

1.2.2. PHY Layer Transceiver Components

Transceivers in Intel® Cyclone® 10 GX devices support both Physical Medium Attachment (PMA) and Physical Coding Sublayer (PCS) functions at the physical (PHY) layer.

A PMA is the transceiver's electrical interface to the physical medium. The transceiver PMA consists of standard blocks such as:

  • serializer/deserializer (SERDES)
  • clock and data recovery PLL
  • analog front end transmit drivers
  • analog front end receive buffers

The PCS can be bypassed with a PCS Direct configuration. Both the PMA and PCS blocks are fed by multiple clock networks driven by high performance PLLs. In PCS Direct configuration, the data flow is through the PCS block, but all the internal PCS blocks are bypassed. In this mode, the PCS functionality is implemented in the FPGA fabric.