Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Public
Document Table of Contents

4.3. How Do I Reset?

You reset a transceiver PHY or PLL by integrating a reset controller in your system design to initialize the PCS and PMA blocks. You can save time by using the Intel-provided Transceiver PHY Reset Controller IP core, or you can implement your own reset controller that follows the recommended reset sequence. You can design your own reset controller if you require individual control of each signal for reset or need additional control or status signals as part of the reset functionality.

You can choose from two models for resetting the transceivers, based on your applications:

  • Model 1—Default model (Minimum Assertion Time Requirement)

    Choose the Cyclone® 10 GX Default Settings preset for the Transceiver PHY Reset Controller IP.

  • Model 2—Acknowledgment model

    This model uses an event-driven mechanism. The model is used for applications with strict timing requirements.

Did you find the information on this page useful?

Characters remaining:

Feedback Message