DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.13.25. STAP Radar QR Decomposition 192x204

The QR decomposition reference design implements a sequence of floating-point vector operations.

Single-precision Multiply and Add blocks perform most of the floating-point calculations. The design routes different phases of the calculation through these blocks with a controlling processor that executes a fixed set of microinstructions. FIFO units ensure this architecture maximizes the usage of the Multiply and Add blocks.

This design uses the Run All Testbenches block to access enhanced features of the automatically generated testbench. An application specific m-function verifies the simulation output, to correctly handle the complex results and the numerical approximation due to the floating-point format.

The model file is STAP_qrd192x204.mdl. The parallel version model file is STAP_qrd192x204_p.mdl.