DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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15.4.25. Divide

The Divide block outputs the first input, a, divided by the second input, b.

q = a/b

Table 192.  Parameters for the Divide Block
Parameter Description
Output data type mode Determines how the block sets its output data type:
  • Inherit via internal rule: if the input data types are floating-point, the output data type is the same floating-point data type. Mixing different precisions is not allowed.
If the input data types are fixed-point, the output data type is fixed point with bitwidth equal the to the sum of the bitwidths of the input data types. The fraction width is equal to the sum of the fraction width of the a-input data type, and the integer bitwidth of the b-input data type.
  • Specify via dialog: you can set the output type of the block explicitly using additional fields that are available when this option is selected. This option type casts the output to the chosen fixed-point type. Attempting to type cast floating-point input is disallowed. You can only use this option to trim bits off the least significant end of the output data type that is otherwise inherited.
Output data type Specifies the output data type. For example, fixdt(1,16,15)
Rounding mode Specifies what rounding to apply to the result:
  • Correct. IEEE compliant unbiased round to nearest output value.
  • Faithful. Saves hardware by sometimes rounding to the second nearest value. Error is about double that of correct rounding.
Output scaling value Specifies the output scaling value. For example, 2^-15.
Float point rounding This option only has an effect for floating-point inputs.:
  • Correct: the result is correctly rounded IEEE
  • Faithful: the result is may be rounded up or may be rounded down

Table 17–46 shows the data-type inheritance for fixed-point inputs.

Table 193.  Data-Type Inheritance for Fixed-Point Inputs
Port Fixed-Point Data Type Integer Bits Fraction Bits
a sfix16_en10 6 10
b sfix12_en7 5 7
q (Inherit via internal rule) sfix28_en15 6 + 7 = 13 10 + 5 = 15

If you specify Specify via dialog for the Output data type mode, the block restricts the allowed data types to: sfix28_en15, sfix27_en14, sfix26_en13, etc.

Table 194.  Port Interface for the Divide Block
Signal Direction Type Description Vector Data Support Complex Data Support
a Input Any fixed- or floating-point type. Numerator Yes No
b Input Any fixed- or floating-point type. Denominator Yes No
q Output Any fixed- or floating-point type. Result Yes No