DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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Document Table of Contents

7.12.19. Quadrature Amplitude Modulation

This design example implements a simple quadrature amplitude modulation (QAM256) design example with noise addition. The testbench uses various Simulink blocks.

The top-level testbench includes Control, Signals, Run ModelSim, and Run Quartus Prime blocks.

The QAM256Chip subsystem includes Add, GPIn, GPOut, BitExtract, Lut, BitCombine, and SynthesisInfo blocks.

The model file is demo_QAM256.mdl.

Note: This design example uses the Simulink Communications Blockset.