DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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15.4.8. Bit Combine (BitCombine)

The BitCombine block outputs the bit concatenation of the input values:

((h << bitwidth(i)) | i)

You can change the number of inputs on the BitCombine block according to your requirements. When Boolean vectors are input on multiple ports, DSP Builder combines corresponding components from each vector and outputs a vector of signals. The widths of all input vectors must match. However, the widths of the signals arriving on different inputs do not have to be equal. The one input BitCombine block is a special case that concatenates all the components of the input vector, so that one wide scalar signal is output. Use with logical operators to apply a 1-bit reducing operator to Boolean vectors.

Table 163.  Parameters for the BitCombine Block
Parameter Description
Number of inputs Specifies the number of inputs.
Output data type mode Determines how the block sets its output data type:
  • Inherit via internal rule: the number of integer and fractional bits is the maximum of the number of bits in the input data types.
  • Specify via dialog: you can set the output type of the block explicitly using additional fields that are available when this option is selected.This option reinterprets the output bit pattern from the LSB up according to the specified type.
  • Boolean: the output type is Boolean.
Output data type Specifies the output data type. For example, sfix(16), uint(8).
Output scaling value Specifies the output scaling value. For example, 2^-15.
Table 164.  Port Interface for the BitCombine Block
Signal Direction Type Description Vector Data Support Complex Data Support
i Input Any fixed-point type Operand Yes No
h Input Any fixed-point type Operand Yes No
q Output Derived fixed-point type Result Yes No