DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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7.14.9. Real Mixer

This design example shows how to mix non-complex signals.

The top-level testbench includes Control, Signals, Run ModelSim, and Run Quartus Prime blocks, plus ChanView block that deserialize the output buses. An Edit Params block allows easy access to the setup variables in the setup_demo_mix.m script.

The MixerSystem subsystem includes the Device and Mixer blocks.

The model file is demo_mix.mdl.

Note: This design example uses the Simulink Signal Processing Blockset.