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- 15.3.12. Fully-Parallel FFTs with Flexible Ordering (FFT2X, FFT4X, FFT8X, FFT16X, FFT32X, and FFT64X)
- 15.3.13. General Multitwiddle and General Twiddle (GeneralMultiTwiddle, GeneralMultVTwiddle, GeneralTwiddle, GeneralVTwiddle)
15.4.23. Dual Memory (DualMem)
The behavior of read during write cycles of the memories depends on the interface to which you read:
- Reading from q1 while writing to interface 1 outputs the new data on q1 (write first behavior).
- Reading from q2 while writing to interface 1 outputs the old data on q2 (read first behavior).
Turning on DONT_CARE may give a higher fMAX for your design, especially if you implement the memory as a MLAB. When this option is on, the output is not double-registered (and therefore, in the case of MLAB implementation, uses fewer external registers), and you gain an extra half-cycle on the output. The word don’t care overlaid on the block symbol indicates the current setting is DON’T CARE. The default is off, which outputs old data for read-during-write.
|Output data type mode||Determines how the block sets its output data type:
|Output data type||Specifies the output data type. For example, sfix(16), uint(8).|
|Output scaling value||Specifies the output scaling value. For example, 2^-15.|
|Initial contents||Specifies the initialization data. The size of the 1-D array determines the memory size. This parameter may also be a fi object when specifying data of arbitrarily high precision.|
|Use DONT_CARE when reading from and writing to the same address||
Turn this option on to produce faster hardware ( a higher fMAX) but with uncertain read data in hardware if you are simultaneously reading from and writing to the same address. Ensure that you do not read from or write to the same address at the same time to guarantee valid read data.
Intel Hyperflex architectures restrict permissible configurations of the DualMem block. You might need to turn on this option for a valid configuration, if DSP Builder gives a warning.To avoid this restriction, implement a simple dual-port RAM, with port 1 as write-only (e.g. connect q1 read on port 1 to a Simulink terminator block), and port 2 as read-only (with separate addressing).
When you turn on this option and you have a write on one port, a read on another port, and both have the same address, the read data is undefined. Simulink simulations represent these undefined values as zeros; the ModelSim simulation shows Xs. This difference in representation may cause simulation mismatches if you allow such undefined values to be generated. To prevent simulation mismatches:
|Allow write on both ports||Turn on to read and write on both ports.|
|Initialize Hardware Memory Blocks with Initial Data Contents||Turn on to initialize the memory with the specified initial data values. Turn off to use only the size of the initial data for the size of memory. The Uninitialized means parameter on the Control Block Optimization tab determines the content when the memory is uninitialized..|
|Provide read-access inputs||
Turn on to expose the memory read-access input control ('r1', 'r2') for each output port ('q1', 'q2'). You can use a read-access input to indicate when the corresponding output is not used. Disabling the output when the read-access input is '0', offers potential power-saving benefits and avoids write-read contention. When a read-access input is '0', you cannot assume the value of the corresponding output. The hardware response to read-access input '0' depends on the underlying physical memory's capabilities and design configuration.
Turn off (default) to expose no read-access input controls. This setting is equivalent to permanently enabling read access to the outputs by driving the inputs with constant '1'.
You can specify the contents of the DualMem block in one of the following ways:
- Use a single row or column vector to specify table contents. The length of the 1D row or column vector determines the number of addressable entries in the table. If DSP Builder reads vector data from the table, all components of a given vector share the same value.
- When a look-up table contains vector data, you can provide a matrix to specify the table contents. The number of rows in the matrix determines the number of addressable entries in the table. Each row specifies the vector contents of the corresponding table entry. The number of columns must match the vector length, otherwise DSP Builder issues an error.
Every Primitive library block accepts double-precision floating-point values when specifying mask parameters. This format limits precision to no more than 53 bits, which is more than sufficient for most of the blocks. For higher precision, the Const, DualMem, or LUT blocks optionally accept values using Simulink's Fixed Point data type. For example:
constValue = fi(0.142, 1, 16, 15)
vectorValue = fi(sin([0:10]'), 1, 18, 15)
To configure a Const, DualMem, or LUT with data of precision higher than IEEE double precision, create a MATLAB fi object of the required precision that contains the high precision data. Avoid truncation when creating this object. Use the fi object to specify the Value of the Const, the Initial Contents of the DualMem block, or the Output value map of the LUT block.
|Signal||Direction||Type||Description||Vector Data Support||Complex Data Support|
|d1||Input||Any||Data to write for interface 1||Yes||Yes|
|a1||Input||Unsigned integer||Address to read or write from for interface 1||Yes||No|
|w1||Input||Boolean||Write is enabled for interface 1 when 1||Yes||No|
|r1||Input||Boolean||Read-access control for q output of interface 1. Only present when you turn on Provide Read-Access Inputs||Yes||No|
|d2||Input||Any||Data to write for interface 2. Only present when you turn on Allow write on both ports||Yes||Yes|
|a2||Input||Unsigned integer||Address to read or write from for interface 2||Yes||No|
|w2||Input||Boolean||Write is enabled for interface 2 when 1. Only present when you turn on Allow write on both ports||Yes||No|
|r2||Input||Boolean||Read-Access control for q output of interface 1. Only present when you turn on Provide Read-Access Inputs||Yes||No|
|q1||Output||Any||Data out from interface 1. (1)||Yes||Yes|
|q2||Output||Any||Data out from interface 2. (1)||Yes||Yes|
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