DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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Document Table of Contents

4.1.1. Dividing your DSP Builder Design into Subsystems


  1. Consider how to divide your design into subsystems. A hierarchical approach makes a design easier to manage, more portable thus easier to update, and easier to debug. If it is a large design, it also makes design partition more manageable.
  2. Decide on your timing constraints. DSP Builder advanced blockset achieves timing closure based on your timing constraints, namely sample rate and clock rate. A modular design with well-defined subsystem boundaries, allows you to precisely manage latency and speed of different modules thus achieving timing closure effortlessly.
  3. Consider the following factors when dividing your design into subsystems:
    • Identify the functionality of each submodule of your algorithm, and if you can partition your design into different functional subsystems.
    • In multirate designs consider the sample rate variation at different stages of a datapath. Try not to involve too many different sample rates within a subsystem.
    • If your design has a tight latency requirement, use latency management to define the boundary of a subsystem. DSP Builder advanced blockset applies latency constraints on a subsystem basis.
  4. To simplify synchronization, implement modules, which DSP Builder can compute in parallel, in the same subsystem. DSP Builder can apply the same rules more easily to each of the parallel paths. Do not worry about constraining the two paths that may otherwise have different latencies.