DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

15.6.15. Vector Fanout (VectorFanout)

The VectorFanout block behaves like a wire, connecting its single input to one vector output that contains several copies of the single input. The Fanout and VectorFanout are similar blocks. For a description of the VectorFanout block, refer to the Fanout block.

Table 274.  Parameters for the VectorFanout Block
Parameter Type Description
Vector width Integer > 0 Vector width of output port.
Allow use of uninitialized registers Check box Turn on to allow DSP Builder to use hyper registers. DSP Builder does not initialize the inserted routing registers on reset
Table 275.  Port Interface for the VectorFanout Block
Signal Direction Type Description
d Input Any scalar Input
q Output Vector of d's input type (Vector width) copies of d.

Did you find the information on this page useful?

Characters remaining:

Feedback Message