DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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7.12.3. Bit Combine for Boolean Vectors

This design example demonstrates different ways to use the BitCombine primitive block to create signals of different widths from a vector of Boolean signals.

The one input BitCombine block is a special case that concatenates all the components of the input vector and produces one wide scalar output signal. You can apply 1-bit reducing operators to vectors of Boolean signals. The BitCombine block supports multiple input concatenation. When vectors of Boolean signals are input on multiple ports, corresponding components from each vector are combined so that the output is a vector of signals.

The model file is demo_bitcombine.mdl.