DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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15.6.8. Pause

The Pause block implements a breakpoint with trigger count to break and single step through Simulink simulations.

Input is a Boolean signal enabling a counter, which counts up to the parameterized count value, then pauses the simulation. Press play to resume simulation from that point. If you do not increase the trigger count, the block causes another pause. This single stepping mode pauses the simulation at the next cycle.The block is red when enabled.

Use the Pause block for debugging designs. For example; run to breakpoint, then turn on Show port values when hovering at this point. This option permanently causes slow simulation, so only turn on when stepping through. Using display blocks allows you to see variables displayed at the paused time (similar to watch variables in a software debugger). You can change the trigger count, for example by adding 100, to simulate the next 100 cycles. The block color changes to red when you turn on the Pause block. Use the valid signal as the input, so that it counts valid steps only. Alternatively, use a different control signal, such as a writeenable, as an input to get the system to break then. You can easily add other logic blocks to generate a break signal that you can use just for debugging.