DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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7.14.4. Four Channel, Eight Banks, Two Wires NCO

This design example implements a NCO with four channels and eight banks.

This design example is similar to the Four Channel, 16 Banks NCO design, but has only eight banks of phase increment values (specified in the setup script for the workspace variable) feeding into the NCO. Furthermore, the sample time for the NCO requires two wires to output the four channels of the sinusoidal signals. Two wires exist for the NCO output, each wire only contains two channels. Hence, the channel indicator is from 0 .. 3 to 0 .. 1.

You can inspect the eight peaks on the spectrum graph for each channel and see the smooth continuous sinusoidal waves on the scope display.

This design example uses an additional subsystem (Select_bank_out) to extract the NCO-generated sinusoidal signal of a selected bank on a channel.

The design example outputs the data to the workspace and plots through with the separate demo_mc_nco_extracted_waves.mdl, which demonstrates that the output of the bank you select does represent a genuine sinusoidal wave. However, from the scope display, you can see that the sinusoidal wave is no longer smooth at the switching point, because the design example uses the different values of phase increment values between the selected banks. You can only run the demo_mc_nco_extracted_waves.mdl model after you run demo_mc_nco_8banks_2wires.mdl.

The top-level testbench includes Control, Signals, BusStimulus, Run ModelSim, and Run Quartus Prime blocks, plus ChanView blocks that deserialize the output buses. An Edit Params block allows easy access to the setup variables in the setup_demo_mc_nco_8banks_2wires.m script.

The NCOSubSystem subsystem includes the Device and NCO blocks.

The Select_bank_out subsystem contains Const, CompareEquality, and AND Gate blocks.

The model file is demo_mc_nco_8banks_2wires.mdl.

Note: This design example uses the Simulink Signal Processing Blockset.