DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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Document Table of Contents Performing Bit-Accurate Simulation

For most floating-point designs, and any fixed-point designs that use the ConstMult block, the default Simulink simulation only approximates the behavior of the generated hardware. Therefore, DSP Builder supports bit-accurate simulation.


  1. Open the SynthesisInfo block parameter dialog box.
  2. Turn on Bit Accurate Simulation.

    When you turn on bit-accurate simulation and you simulate the design, the Simulink simulation is no longer based on the multiprecision floating-point library. Instead, the Simulink simulation signal values are generated from the same model of the floating-point operations that generate the RTL. Therefore, the simulation values exactly match the values that the hardware produces.

    Note: Do not turn on Bit Accurate Simulation when your design includes Memory-Mapped library blocks, otherwise the simulation is all zeros.
    The bit-accurate simulation correctly reproduces the signal values of the data paths in the design, but the timing of those signals may not necessarily reflect any register retiming that the scheduler has carried out. To make the bit-accurate simulation also reproduce the correct timing:
    1. Click DSP Builder > Verify Design
    2. Click on the Advanced tab.
    3. Turn on Bit accuracy is also cycle accurate