DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022

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11.4. Trading Off Logic Utilization and Accuracy in DSP Builder Designs


If your design exceeds the relative accuracy but is using too much hardware:
  1. Use the next lowest precision
  2. Use faithful rounding instead of correct rounding
  3. Enable the fused datapath option
Each of these changes reduces logic utilization at the expense of accuracy. A design may use more than one floating-point precision for different sections of the circuit, however if there are too many different precisions you will need to have more type conversion blocks. Each convert block increases logic utilization.