- 18.104.22.168. Reducing Opening a Project, Creating Design Partitions, andPerforming an Initial Compilation
- 22.214.171.124. Specifying a Destination Library Name in the Intel® Quartus® Prime Settings File or with Tcl
126.96.36.199. Specifying a Destination Library Name in a VHDL File
You can use the library synthesis directive to specify a library name in your VHDL source file. This directive takes the name of the destination library as a single string argument. Specify the library directive in a VHDL comment before the context clause for a primary design unit (that is, a package declaration, an entity declaration, or a configuration), with one of the supported keywords for synthesis directives, that is, altera, synthesis, pragma, synopsys, or exemplar.
The library directive overrides the default library destination work, the library setting specified for the current file in the Settings dialog box, any existing .qsf setting, any setting made through the Tcl interface, or any prior library directive in the current file. The directive remains effective until the end of the file or the next library synthesis directive.
The following example uses the library synthesis directive to create a library called my_lib containing the my_entity design unit:
-- synthesis library my_lib library ieee; use ieee.std_logic_1164.all; entity my_entity(...) end entity my_entity;
The Intel® Quartus® Prime software generates an error if you use the library directive in a design unit.
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