Quartus® Prime Standard Edition User Guide: Design Compilation

ID 683283
Date 10/22/2021
Document Table of Contents LogicLock Region Assignments

The project lead typically creates LogicLock region assignments in the top-level design for any lower-level partition designs where designer or IP providers plan to export post-fit information to be used in the top-level design, to help avoid placement conflicts between partitions. When you use the .qxp as a source file, LogicLock constraints from the exported partition are applied in the top-level design, but will not appear in your .qsf file or LogicLock Regions window for you to view or edit. The LogicLock region itself is not required to constrain the partition placement in the top‑level design if the netlist type is set to Post-Fit, because the netlist contains all the placement information.