Intel® Quartus® Prime Standard Edition User Guide: Design Compilation

ID 683283
Date 9/24/2018
Document Table of Contents Impact of Using Incremental Compilation with Design Partitions

Table 1.  Impact Summary of Using Incremental Compilation


Impact of Incremental Compilation with Design Partitions

Compilation Time Savings

Typically saves an average of 75% of compilation time for small design changes in large designs when post-fit netlists are preserved; there are savings in both Intel® Quartus® Prime Integrated Synthesis and the Fitter. 1

Performance Preservation

Excellent performance preservation when timing critical paths are contained within a partition, because you can preserve post‑fitting information for unchanged partitions.

Node Name Preservation

Preserves post‑fitting node names for unchanged partitions.

Area Changes

The area (logic resource utilization) might increase because cross-boundary optimizations are limited, and placement and register packing are restricted.

fMAX Changes

The design’s maximum frequency might be reduced because cross‑boundary optimizations are limited. If the design is partitioned and the floorplan location assignments are created appropriately, there might be no negative impact on fMAX.

1 Intel® Quartus® Prime incremental compilation does not reduce processing time for the early "pre-fitter" operations, such as determining pin locations and clock routing, so the feature cannot reduce compilation time if runtime is dominated by those operations.

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