Intel® Quartus® Prime Standard Edition User Guide: Design Compilation

ID 683283
Date 9/24/2018
Document Table of Contents General Guidelines for Implementation

  • An internal clock source, such as a PLL, should be implemented in a safe partition.
  • An I/O pin driving the external clock should be indicated as a safety pin.
  • To export a safety IP containing several partitions, the top-level partition for the safety IP should be exported. A safety IP containing several partitions is flattened and converted into a single partition during export. This hierarchical safety IP is flattened to enure bit-level settings are preserved.
  • Hard blocks implemented in a safe partition needs to stay with the safe partition.

Did you find the information on this page useful?

Characters remaining:

Feedback Message