Intel® Cyclone® 10 GX Transceiver PHY User Guide

ID 683054
Date 4/14/2023
Public
Document Table of Contents

8.5.1.2. XCVR_C10_RX_EQ_DC_GAIN_TRIM

Pin planner or Assignment Editor Name

Receiver High Gain Mode Equalizer DC Gain Control

Description

Controls the DC gain of the continuous time linear equalizer (CTLE) in high gain mode. A higher gain setting results in a larger DC gain.

For RX_LINK=SR, the default value is STG2_GAIN7.

For PCIe, default value is NO_DC_GAIN.

Table 231.  Available Options
Value in TTK Value in Assignment Editor / qsf Description
DC Gain 0 NO_DC_GAIN No DC gain
DC Gain 1 STG1_GAIN7 Equalizer DC gain setting 6
DC Gain 2 STG2_GAIN7 Equalizer DC gain setting 13
DC Gain 3 STG3_GAIN7 Equalizer DC gain setting 20
DC Gain 4 STG4_GAIN7 Equalizer DC gain setting 27

Assign To

RX serial data pin.

Syntax

set_instance_assignment -name XCVR_C10_RX_EQ_DC_GAIN_TRIM <value> -to <rx_serial_data pin name>