F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 12/15/2021
Public

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8.2.2. Programming the Design into an Intel FPGA

After you enable the F-Tile transceiver toolkit parameters in the F-Tile PMA/FEC Direct PHY Intel® FPGA IP design, you can compile, and generate the programming files. You can then program the design into an Intel FPGA.

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