F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 12/15/2021
Public

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3.5.1. Parallel Data Mapping Information

Refer to the following references for parallel data mapping information for different PMA width combinations using the formulas specified in Bit Mapping for PMA and FEC Mode PHY TX and RX Datapath .

Table 57.  PMA Direct Mode Valid Parallel Data Bits
TX/ RX PMA Width Enable TX/RX Double Width Transfer Valid Parallel Data Note
8 No Data [7:0] NA
10 No Data [9:0] NA
16 No Data [15:0] NA
20 No Data [19:0] NA
32 No Data [31:0] NA
8 Yes

Data [47:40]

Data [7:0]

NA
10 Yes

Data [49:40]

Data [9:0]

NA
16 Yes

Data [55:40]

Data [15:0]

Data [15:0] is the lower bits data.

Data [55:40] is the upper bits data.

20 Yes

Data [59:40]

Data [19:0]

Data [19:0] is the lower bits data.

Data [59:40] is the upper bits data.

32 Yes

Data [71:40]

Data [31:0]

Data [31:0] is the lower bits data.

Data [71:40] is the upper bits data.

64 Yes

Data [151:120]

Data [111:80]

Data [71:40]

Data [31:0]

Data [71:40] and Data [31:0] are the first stream data group. In this group, Data [31:0] is the lower bits data. Data [71:40] is the upper bits data.

Data [151:120] and Data [111:80] are the second stream data group. Data [111:80] is the lower bits data. Data [151:120] is the upper bits data.

128 Yes

Data [311:280]

Data [271:240]

Data [231:200]

Data [191:160]

Data [151:120]

Data [111:80]

Data [71:40]

Data [31:0]

Data [71:40] and Data [31:0] are the first stream data group. In this group, Data [31:0] is the lower bits data. Data [71:40] is the upper bits data.

Data [151:120] and Data [111:80] are the second stream data group. In this group, Data [111:80] is the lower bits data. Data [151:120] is the upper bits data.

Data [231:200] and Data [191:160] are the third stream data group. In this group, Data [191:160] is the lower bits data. Data [231:200] is the upper bits data.

Data [311:280] and Data [271:240] are the fourth stream data group. In this group, Data [271:240] is the lower bits data. Data [311:280] is the upper bits data.

Table 58.  FEC Direct Mode Valid Parallel Data Bits
TX/ RX PMA Width Enable TX/RX Double Width Transfer Valid Parallel Data Note
32 Yes

Data [72:40]

Data [32:2]

Sync head [1:0]

Data [72:40] is the upper 33 bits data.

Data [32:2] is the lower 31 bits data.

Data [1:0] is the sync head.

64 Yes

Data [152:120]

Data [112:82]

Sync head [81:80]

Data [72:40]

Data [32:2]

Sync head [1:0]

Second stream:

Data [152:120] is the upper 33 bits data.

Data [112:82] is the lower 31 bits data.

Data [81:80] is the sync head

First stream:

Data [72:40] is the upper 33 bits data.

Data [32:2] is the lower 31 bits data.

Data [1:0] is the sync head

128 Yes

Data [312:280]

Data [272:242]

Sync head [241:240]

Data [232:200]

Data [192:162]

Sync head [161:160]

Data [152:120]

Data [112:82]

Sync head [81:80]

Data [72:40]

Data [32:2]

Sync head [1:0]

Fourth stream:

Data [312:280] is the upper 33 bits data.

Data [272:242] is the lower 31 bits data.

Data [241:240] is the sync head

Third stream:

Data [232:200] is the upper 33 bits data.

Data [192:162] is the lower 31 bits data.

Data [161:160] is the sync head

Second stream:

Data [152:120] is the upper 33 bits data.

Data [112:82] is the lower 31 bits data.

Data [81:80] is the sync head

First stream:

Data [72:40] is the upper 33 bits data.

Data [32:2] is the lower 31 bits data.

Data [1:0] is the sync head

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