F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 12/15/2021
Public

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2.1.8. Embedded Multi-die Interconnect Bridge (EMIB)

An EMIB connects a stream in F-tile to the FPGA core. An F-tile has 24 EMIB streams. An EMIB stream can be mapped to one or more hard IPs. See the figure in F-Tile Building Blocks for EMIB-to-hard-IP mapping.

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