F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 12/15/2021
Public

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3.14.1.4. TX Error Injection

FHT PMA supports programmable number of error injection into the TX datapath.

To configure the TX datapath error injection, follow these steps:

  1. Write cfg_tx_err_inj_mask_cfg (0x45808[21:6]) to a value that you want to mask the TX data with and cause an error injection.
  2. Write cfg_tx_err_inj_mask_load (0x45810[0]) to 1'b1. (self-clears to 1'b0).
    Note: When you write a 1'b1 to this bit, the internal 128-bit error mask register shifts left by 16 bits, and the new 16-bit mask value replaces the LSB bits in the register. The 64-bit and 32-bit width modes use only the MSBs of the datapath. Therefore, you must load the mask multiple times to shift it into the MSB bits.
  3. Write err inj block-write cfg_tx_err_inj_en (0x45808[0]) to 1'b1 to enable error injection.
  4. Write cfg_tx_err_inj_trig (0x4580C[0]) to 1'b1 (self-clears to 1'b0) to inject the errors. Every time you write a 1'b1 to this bit, the 128 bit of datapath is XORed with 128 bits of error mask register.
  5. Repeat steps 1 and 2 to inject more errors.

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