Quartus® Prime Compiler, the Assembler module generates files for device programming according to specifications in the Device & Pin Options dialog box.
Most compilation flows direct the Assembler module to generate SRAM Object Files (.sof). The
Quartus® Prime software allows converting these .sof into other files to further specify how to save the logic in the target FPGA or configuration device.
Quartus® Prime Programming File Generator tool (File > Programming File Generator) allows you specify and generate programming files for a target device.
The Programming File Generator's graphical interface adapts to your previous choices by only displaying options that generate valid results, and enabling file generation only after the setup is complete.
The following figure illustrates the stages of the file generation process:
Flash partitions allow you to store bitstreams or raw data.
Note: The Programming File Generator supports defining flash partitions only for JIC or POF programming files.
To create flash partitions in the Configuration Devices tab:
Select the device and click Add
In the Add Partition
dialog box, define the following parameters, and then click OK:
Name that you give to the partition
Input file to program into the flash
Configuration devices can store multiple configuration bitstreams in flash memory, called pages. CFI configuration device can store up to eight configuration bitstreams.
Stratix® 10 devices can store up to four configuration bitstreams, including factory image.
Stratix® 10 devices, with the remote system update feature enabled, Page represents the parity.
The options are:
The tool automatically
allocates a block in the flash device to store the
You specify the start and end
address of the flash partition.
You only specify the start
address of the partition. The tool assigns the end
address of the partition based on the input data
Specifies the start address of the partition.
Only enabled when Address
Mode is Block
Specifies the end address of the partition. Only
enabled when Address Mode is
The partition associated to the device appears in the
If you want to change the parameters of a partition, click the
partition and then click Edit....
If you want to remove a partition, click the partition and then
After specifying the settings for all flash
partitions, click Generate.
Design Security Keys
Quartus® Prime Programmer supports the
generation of encryption key programming files and encrypted configuration files for
Intel® FPGAs that support the design
security feature. You can also use the
Programmer to program the encryption key into the FPGA.
For details on using design security features in
Intel® FPGAS, refer to AN 556: Using the
Design Security Features in
Quartus® Prime software provides the Convert Programming Files tool (File > Convert Programming Files), which allows you to convert programming files from one file format to another.The Convert Programming Files dialog box is a legacy tool that supports file conversion for older device families.
The Convert Programming Files tool supports the following design families:
Table 2. Device Families that the Convert Programming Files Tool Supports
The Convert Programming Files tool also allows you to configure multiple devices with an external host, such as a microprocessor or CPLD. For example, you can combine multiple .sof files into one .pof file.
To save time in subsequent conversions, click Save Conversion Setup to write the conversion specifications in a Conversion Setup File (.cof).
To load a .cof setup in the Convert Programming Files dialog box, click Open Conversion Setup Data .
Conversion Setup File Contents
For example, to store the FPGA data in configuration devices, you can
convert the .sof data to another format, such
as .pof, .hexout, .rbf, .rpd, or .jic,
and then program the configuration device.
Quartus® Prime software can generate optional programming or configuration files in formats that you can use with programming tools other than the
Quartus® Prime Programmer.
When you compile a design in the
Quartus® Prime software, the Assembler automatically generates either a .sof or .pof file. The Assembler also allows you to convert FPGA configuration files to programming files for configuration devices.
Secondary Programming Files
Quartus® Prime software generates
programming files in various formats for use with different programming tools.
Quartus® Prime Software Support for
Secondary File Types
Quartus® Prime Programmer supports Raw Binary (.rbf) File format in Passive Serial (PS)
Quartus® Prime software allows generating programming files from the command line. You can incorporate these commands to scripted flows.
quartus_pfg Command Line Tool
The Programing File Generator is also available as the quartus_pfg executable. You can specify conversion settings in the command line or through a PFG setting file (.pfg). This ability is useful for advanced designs that require multiple images or multiple user data files (HEX/RBF), because you define the settings once in the GUI and then export for subsequent use in the command line.
To export PFG settings to a .pfg file, click File > Save. The Programming File Generator only saves settings that are consistent.
For more information about the quartus_pfg executable, type the following in the command line:
Differences Between GUI and Command Line Tool
The command line tool supports single image conversion only.
quartus_cpf Command Line Tool
The Convert Programming Files tool is also available as the quartus_cpf command line executable. You can specify conversion settings in the command line or with a conversion setup file (.cof).
For help with the quartus_cpf executable,
type the following at the command
Quartus® Prime Programmer allows you to program and configure
Intel® CPLD, FPGA, and configuration devices.
The files that the Programmer loads into devices are part of the output of a design compilation. After you program the design you can test functionality on a circuit board.
Stand-Alone Intel Quartus Prime Programmer
Intel FPGA offers the free stand-alone Programmer, which has the same full functionality as the Programmer in the
Quartus® Prime software.
The stand-alone Programmer is useful when programming devices with another workstation because you do not need extra full licenses. You can download the stand-alone Programmer from the Download Center on the Intel website.
The stand-alone Programmer supports combining or converting
Quartus® Prime programming files with the Convert Programming Files and the Programming File Generator. tools. You access both tools from the File menu in the Programmer window.
Before you can program or configure the device, you must have the
correct hardware setup.
Programmer provides the flexibility to choose a download cable or programming
Quartus® Prime Programmer
automatically detects devices with shared JTAG IDs, the Programmer prompts you to
specify the device in the JTAG chain.
If the Programmer does not prompt you
to specify the device, you must manually add each device in the JTAG chain to the
Programmer, and define the instruction register length of each device.
To edit the details of an unknown device, follow these steps:
Double-click the unknown device listed under the device column.
Change the device Name.
Specify the Instruction register
Save the .cdf file.
Setting the JTAG Hardware
The JTAG server allows the
Quartus® Prime Programmer to access the JTAG hardware.
You can also access the JTAG download cable or programming hardware connected to a remote computer through the JTAG server of that computer. With the JTAG server, you can control the programming or configuration of devices from a single computer through other computers at remote locations. The JTAG server uses the TCP/IP communications protocol.
Running JTAG Daemon with Linux
The JTAGD daemon is the Linux version of a JTAG server.
The JTAGD daemon allows a remote machine to program or debug boards connected to a Linux host over the network. The JTAGD daemon also allows programs to share JTAG resources.
Running the JTAGD daemon prevents:
The JTAGD server from exiting after
two minutes of idleness.
The JTAGD server from not accepting
connections from remote machines, which might lead to an intermittent failure.
To run JTAGD as a daemon:
Set the permissions of this directory and the files in the directory to allow read/write access.
Execute jtagd (with no arguments) from the quartus/bin directory.
The JTAGD daemon is now running and does not terminate when you log off.
JTAG Chain Debugger Tool
The JTAG Chain Debugger tool allows you to test the JTAG chain integrity and detect intermittent failures of the JTAG chain.
In addition, the tool allows you to shift in JTAG instructions and data through the JTAG interface, and step through the test access port (TAP) controller state machine for debugging purposes.
You access the tool by clicking Tools > JTAG Chain Debugger on the
Quartus® Prime software.
Verifying if Programming Files Correspond to a Compilation of the Same Source Files
Quartus® Prime programming files support the project hash property,
which helps you determine if two or more programming files correspond to a compilation of the
same set of source files.
During compilation, the
Quartus® Prime software produces a unique project hash, and embeds this value in the programming files (.sof).
The project hash does not change for different builds of the
Quartus® Prime software, or when you
install a software update. However, if you upgrade any IP with a different build or patch, the project hash changes.
Obtaining Project Hash for Intel Arria 10 Devices
To obtain the project hash value of a .sof programming file for a design targeted to
Arria® 10 devices, use the quartus_asm
command-line executable (quartus_asm.exe in Windows) with
the --project_hash option.
quartus_asm --project_hash <sof-file>
Output of Project Hash
In this example, the programming file is worm.sof.
Info: Running Quartus Prime Assembler
Info: Version 17.0.0 Build 288 04/12/2017 SJ Pro Edition
Info: Copyright (C) 2017 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and its AMPP partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel MegaCore Function License Agreement, or other
Info: applicable license agreement, including, without limitation,
Info: that your use is for the sole purpose of programming logic
Info: devices manufactured by Intel and sold by Intel or its
Info: authorized distributors. Please refer to the applicable
Info: agreement for further details.
Info: Processing started: Fri Apr 14 18:01:47 2017
Info: Command: quartus_asm -t project_hash.tcl worm.sof
Info: Quartus(args): worm.sof
Info (23030): Evaluation of Tcl script project_hash.tcl was successful
Info: Quartus Prime Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 1451 megabytes
Info: Processing ended: Fri Apr 14 18:01:56 2017
Info: Elapsed time: 00:00:09
Info: Total CPU time (on all processors): 00:00:04
Parallel and serial configuration devices do not support the JTAG interface. However, you can use a flash loader to program configuration
devices in-system via the JTAG interface. You can use an FPGA as a bridge between the JTAG interface and the configuration device. The
Quartus® Prime software supports parallel and serial flash loaders.
In addition to the
Quartus® Prime Programmer GUI, you can access programmer functionality from the command line and from scripts with the
Quartus® Prime command-line executable quartus_pgm.exe (or quartus_pgm in Linux).
You can use the jtagconfig
command-line utility to check the devices in a JTAG chain and the user-defined devices.
The jtagconfig command-line utility is similar
to the auto detect operation in the
For more information about the jtagconfig utility, use the help available at the command prompt:
jtagconfig [–h | --help]
Note: The help switch does not reference
the -n switch. The jtagconfig -n command shows each node for each JTAG device.
Created topic: Stand-Alone Programmer Memory Limitations from
content in topic: Stand-Alone
Removed outdated support information.
Reverted document title to Programmer User Guide: Intel Quartus Prime Pro
Moved information about programming file
generator to new chapter: Generating
First release as part of the stand-alone
Programmer User Guide
Added Project Hash feature.
Implemented Intel rebranding.
Changed instances of Quartus
II to Intel Quartus Prime.
Added Conversion Setup File (.cof)
description and example.
Updated the Scripting Support section to include
a Linux command to program a device.
Added Running JTAG Daemon.
Removed Cyclone III and Stratix III devices
Removed MegaWizard Plug-In Manager references.
Updated Secondary Programming Files section to add notes
about the Quartus II Programmer support for .rbf files.
Converted to DITA format.
Added JTAG Debug Mode for Partial Reconfiguration and
Configuring Partial Reconfiguration Bitstream in JTAG Debug
Updated Table 18–3 on page 18–6, and Table 18–4 on page
Added “Converting Programming Files for Partial
Reconfiguration” on page 18–10, “Generating .pmsf using a
.msf and a .sof” on page 18–10, “Generating .rbf for Partial
Reconfiguration Using a .pmsf” on page 18–12, “Enable
Decompression during Partial Reconfiguration Option” on page
Updated “Scripting Support” on page 18–15.
Updated Table 18–5 on page 18–8.
Updated “Quartus II Programmer GUI” on page 18–3.
Updated “Configuration Modes” on page 18–5.
Added “Optional Programming or Configuration Files” on page
Updated Table 18–2 on page 18–5.
Added links to Quartus II Help.
Updated “Hardware Setup” on page 21–4 and “JTAG Chain
Debugger Tool” on page 21–4.
Changed to new document template.
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Added links to Quartus II Help.
Added links to Quartus II Help.
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No change to content.
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Changed references from “JTAG Chain Debug” to “JTAG Chain