L-tile and H-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

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ID 683667
Date 11/11/2021
Public
Document Table of Contents

10.5.12. Verilog HDL Formatting Functions

The Verilog HDL Formatting procedures and functions are available in thealtpcietb_bfm_log.v . The formatting functions are only used by Verilog HDL. All these functions take one argument of a specified length and return a vector of a specified length.

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