L-tile and H-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

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ID 683667
Date 11/11/2021
Public
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11.2.1.4.2. NPDME PLL and Channel Commands

These commands use the Native PHY and channel PLL NPDME master ports to read and write registers in the ATX PLL, fPLL, and Native PHY transceiver channels.

Table 82.  NPDME Commands To Access PLLs and ChannelsThese commands are available in the xcvr_pll_test_suite.tcl
Command Description
adme_read32 <slave_if> <reg_addr> Performs a 32-bit read from the slave interface of the register address specified.
adme_read8 <slave_if> <reg_addr> Performs an 8-bit read from the slave interface of the register address specified.
adme_write32 <slave_if> <reg_addr> <value> Performs a 32-bit write of the value specified to the slave interface and register specified
adme_write8 <slave_if> <reg_addr> <value> Performs an 8-bit write of the value specified to the slave interface and register specified
adme_rmw32 <slave_if> <reg_addr> <bit_mask> <value> Performs a 32-bit read-modify-write to the slave interface at the register address using the bit mask specified.
adme_rmw8 <slave_if> <reg_addr> <bit_mask> <value> Performs an 8-bit read-modify-write to the slave interface at the register address using the bit mask specified.
adme_dump_to_file <slave_if> <filename> <start_addr> <end_addr>

Writes the contents of the slave interface to the file specified. The start and end register addresses specify the range of the write.

The <slave_if> argument can have the following values:

  • $atxpll
  • $fpll
  • $channel(<n>)
atxpll_check Checks the ATX PLL lock and calibration status
fpll_check Checks the fPLL lock and calibration status
channel_check Checks each channel clock data recovery (CDR) lock status and the TX and RX calibration status

NPDME Command Examples

The following PLL commands use the addresses specified below in the Register Address Map.

Use the following command to read the value register address 0x480 in the ATX PLL:

% adme_read8 $atxpll_adme 0x480

Use the following command to write 0xFF to register address 0x4E0 in the fPLL:

% adme_write8 $fpll_adme 0x4E0 0xFF

Use the following command to perform a read-modify-write to write register address 0x02 in channel 3:

% adme_rmw8 $channel_adme(3) 0x03 0x02

Use the following command to save the register values from 0x100-0x200 from the ATX PLL to a file:

% adme_dump_to_file $atxpll <directory_path>atx_regs.txt 0x100 0x200

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